AGENDA

Day 1 | Day 2 | Day 3

Generative AI for Virtual Fabs & Accelerated Chip Ecosystems 

This workshop explores opportunities and challenges of “Digital Twins and Generative AI” towards accelerating transitions and adoptions of emerging technologies (materials, processes, tools, transition paths, etc) into the U.S. chips and semiconductor manufacturing ecosystem.  


Benefits:

  • Improved fab yield, productivity, and utilization 
  • Accelerated material, equipment, process adoption 
  • Avoiding pitfalls and faster process development/test 
  • All-of-the-above resulting in improved ROI and economic competitiveness   

Participants

  • NVIDIA  
  • Applied Materials  
  • Intel 
  • Synopsys 
  • University of Florida
  • Dream Photonics
  • Siemens  

AGENDA | Day 1 | Wednesday, Feb. 7

12:00 – 12:30Arrival and Lunch
12:30 – 1:40 

12:30 – 12:40 Associate Dean for Research- Alina Zare

12:40 – 1:10 Nvidia – Eric Breckenfeld

1:10 – 1:25 UF Distinguished Professor – Mark Law

1:25 – 1:40 UF – Kevin Jones
Welcome & Plenaries  
Moderator: Volker Sorger
2:00 – 3:00

2:00 – 2:20 Intel – Steve Cea – Virtual

2:20 – 2:40 Applied Materials – Parnika Agrawal – Virtual

2:40 -3:00 Semiconductor Industry ConsultantSteve Trimberger
Technical Keynotes
Moderator Mark Law
3:00 – 3:15 Coffee Break

3:15 – 4:00

3:15 – 3:35 DreamPhotonics – Bart Bergman

3:35 – 3:55 Siemens – Brett Attaway
Technical Keynotes
Moderator Kevin Jones
4:00 – 4:15

UF Program Director of AI Systems & Applied Data Science – Catia Silva
AI Work Force Development
4:15 – 4:45

7200 – Physical Modeling & Reliability for Next Generation Fabs
Leads: Rick Furtner/ Kevin Jones/ Mark Law

5050 – Virtual IC Fabs
Leads: Bart Bergman / Eric Breckenfeld / Joe Becker/ Nicola Peserico

6118 – Generative AI
Leads: Brett Attaway / Len Orlando / Randy Heilman
/ Hangbo Yang
Technical Breakouts
4:45 – 5:00Report outs
5:00 – 5:30

Volker Sorger, Kevin Jones, Mark Law
CHIPS Planning Session

Next Generation Machine Learning Accelerators

This workshop explores opportunities and challenges around “Next generation machine and deep learning processors” to include electronic, photonic, and hybrid systems. The aim is to identify challenges and opportunities towards a grand challenge of 100x improvement over SOTA. The workshop will also kick-off a 5-year technology roadmap.  


Opportunities & Challenges:

  • Emerging technology: devices, architectures, packaging  
  • Electronics, photonics, hybrid systems 
  • High (100+ TOPS/W) systems 
  • Towards Exascale desktop computing 
  • In-sensor compute near the network edge 
  • Cloud vs. IoT application acceleration 

Participants

  • NVIDIA 
  • Chip Foundries 
  • UCLA
  • UC Davis 
  • University of Florida 
  • Florida Commerce
  • BRIDG
  • Plasma Therm
  • HPE
  • Dream Photonics
  • Jabil
  • imec
  • L3harris

AGENDA | Day 2 | Thursday, Feb. 8

MALACHOWSKY 7200: NEXT GEN AI HARDWARE

MALACHOWSKY NVIDIA AUDITORIUM: SEMICONDUCTOR ECOSYSTEM

8:30 – 10:00

Welcome Remarks

Associate Dean for Academic Affairs -Toshikazu Nishida & ECE Chair – Mark Tehranipoor
8:30 – 8:45

FSI Director – Volker Sorger
8:45 – 9:00

Director of Technology Policy
NVIDIA – Eric Breckenfeld
9:00 – 9:30

Synopsys – Rick Furtner
9:30 – 10:00
Welcome & Plenaries
Moderator Volker Sorger
10:20 -12:00

UCLA – Puneet Gupta
10:20 – 10:40

UC Davis, AI MEC Hub – Ben Yoo-Virtual
10:40 – 11:00

imec – Anna Herr
11:00 – 11:20

Dream Photonics – Bart Bergman
11:20 – 11:40

Hewlett Packard Enterprise – Priya Sundararajan
11:40 -12:00
KeyNotes: Electronics/Photonics
Moderator Nicola Peserico
12:00 – 12:10 Group Photo

12:10 Lunch Break & Poster session
Nvidia Auditorium
1:10 – 2:45

Road map definitions/ Breakout assignments

FSI Director – Volker Sorger
1:00 – 1:15


1:15- 2:00
Break Outs

7028 Co-Design Options
Leads: Puneet Gupta/ Mahdi Nikdast / Steve Trimberger

3003 – Photonics for AI Hardware
Leads: Nicola Peserico/ Bart Bergman

7200 – Network Edge Intelligence
Lead: Rick Furtner/ Mario Miscuglio

6119 – Clould AI
Lead: Eric Breckenfeld/ Sri Sai Cherukuri

2:00 – 2:15
Networking Break & Slide preparation

2:15 – 2:45

Report Out
Moderators: Nicola Peserico & Volker Sorger
Workshop/ CHIPS/ Roadmap
2:45 Transition to Nvidia Auditorium
11:00 – 12:10

Welcome Remarks

FSI Director Volker Sorger -Welcome remarks & introduction
11:00 – 11:05

Director of Technology Policy Nvidia – Eric Breckenfeld
11:05 – 11:20

Laura DiBella
Florida Commerce
11:20 – 11:30

President of BRIDG – John Allgair
11:30 – 11:50

President of Operations imec – Raj Jammy
11:50 – 12:10

Welcome & Plenaries
Moderator Volker Sorger
12:10 – 1:15

Group Photo

Lunch Break & Poster Session

Nvidia Auditorium
1:15 – 1:45

Jabil – Dan Gamota Virtual
1:15 – 1:30

VP of external Affairs & Workforce Integration Space Florida- Mike Miller
1:30 – 1:45

Florida Ecosystem Keynotes

Moderator Navid Asadi
1:45 – 2:00 – Networking Break

2:00 – 4:00

FSI Deputy Director – David Arnold
2:00 – 2:15

Part A – Technician Workforce Development

Valencia – Tiffaney Barnes
2:15- 2:
22

Plasma Therm – Chris Constantine
2:22- 2:
29

Ben Larry – Skywater

2:29 – 2:36

Panel/ Room Discussion

2:36 – 3:11

Part B – Engineer Workforce development

UCF Electrical Engineering chair – Reza Abdolvand
3:11 – 3:18


FSI Deputy Director –
Jack Judy
3:18 – 3:25

Panel Room Discussion

3:25- 4:00


Workforce Development & State Coordination.
Moderators David Arnold & Jack Judy
4:00 – 4:25

L3harris – Senior Fellow Uma Jha
4:00 – 4:15

FSI Director – Volker Sorger
4:10 – 4:25
Concluding Remarks
5:00–6:00

Tours


Nanoscale Research Facility
HiPerGator
FSI/FICS SCAN Lab
Interdisciplinary Microsystems Group



This workshop explores “advanced chip packaging and heterogeneous integration” including 2.5D (interposer) and 3DHI solutions. The aim is to identify challenges and opportunities towards accelerating handshakes from ‘Applied-R&D’ TRL levels to setting up ‘Pilot Line’ implementations. In the breakout session, we will discuss quantifiable milestone targets of advanced chip packaging towards setting up a strategic development roadmap and CHIPS act (e.g. NMI, MEC, NAPMP) funding directions.    


Details of Advanced Packaging & HI include: 

  • Hybrid bonding 
  • Waver level fan-out  
  • Emerging Substrates & Materials (e.g. glass) 
  • Thermal Management 
  • Accelerated Package Test  
  • Chiplet Ecosystem Development 

 Participants (continuously updated):

  • BRIDG 
  • Dream Photonics 
  • FIU 
  • imec 
  • Jabil 
  • NHanced 
  • Skywater 
  • UCLA 
  • Synopsys
  • Nvidia
  • Intel

AGENDA | Day 3 | Friday, Feb. 9

8:30 – 10:00

8:30 – 8:45 HWCOE Int. Dean – Forrest Masters


8:45 – 9:00
FSI Associate Director – Navid Asadi


9:00 – 9:30
NAPMP CHIPS Office Virtual – Deputy Director NAPMP Ndubuisi George Orji


9:30 – 10:00 Int.
President BRIDG – John Allgair
Welcome & Plenaries
Moderator Navid Asadi
10:00 – 10:20 Networking Break
10:20 – 12:00

10:20 – 10:40
VP Sales & Marketing – Nhanced – Chuck Woychik


10:40 – 11:00 Product Management Director – Synopsys – Keith Lanier


11:00 – 11:20
Senior Principle Engineer Intel – Adel Elsherbini – Virtual


11:20 – 11:40 Professor – UCLA – Puneet Gupta


11:40 – 12:00
Associate Professor – FIU- Markondeyaraj Pulugurtha 
 
Technical Keynote
Moderator TBD
12:00 – 1:00 Lunch Break & Poster Session
1:00-2:45

1:00 – 1:15
Road map definitions/ Breakout assignments
FSI Associate Director Navid Asadi

1:15 – 2:00
5050 – Materials and substrates
Lead: Anna Herr/ Chuck Woychik/ Jennifer Hite


7200 – Equipment, tools and processes
Lead: Chris Constantine / Girish Wable / Markondeyaraj Pulugurtha


7028 – Power delivery, thermal management
Lead: Ben Larry / Joe Becker / Antony Dip


3200 – Photonics and connectors
Lead: Puneet Gupta / Keith Lanier / Len Orlando


2:00 – 2:15
Networking Break & Slide preparation

2:15 – 2:45

Report Out
Moderator: FSI Associate Director Navid Asadi

Breakouts
2:45 – 3:05
Senior Engineering Services Manger- Jabil -Girish Wable
Visionary Keynote
3:05 – 3:15
FSI LeadersNavid Asadi & Volker Sorger
Adjourn