2025 Florida Semiconductor Summit Student Posters

Authors: Ahmed Ahmed, Dayane Reis

University: University of South Florida

Abstract: Hyperdimensional computing (HDC) processes information in a high-dimensional space, offering advantages over deep neural networks (DNNs), such as smaller model sizes, robustness to soft errors, and the capability for one/few-shot learning without significant accuracy drops in some applications. Although HDC shows great potential, encoding data into a hyperdimensional space poses challenges due to the significant data movement between processing units and memory in conventional architectures. Processing-in-memory (PIM) embeds computation directly within memory, reducing latency and energy consumption. Among PIM approaches, in-DRAM computation leverages the parallelism of DRAM to perform bulk bit-wise operations with high throughput. In this paper, we present HIDE, the first hyperdimensional in-DRAM encoder for fast and energy-efficient classification. HIDE integrates HDC encoding directly within commodity DRAM, significantly reducing energy consumption and improving system performance. HIDE achieves up to 272.8× (23.3×) encoding speedup over a CPU (GPU) during training, with energy reductions of 94.8% (95.0%) during training (inference). Integrating HIDE with the GPU achieves an overall system speedup of 15× (7.2×) during training (inference) compared to a GPU-only system, along with energy savings of 92.3% and 82.7%, respectively, for classification tasks with the MNIST, ISOLET, and UCHAR datasets.

Authors: Arefa Billa, Joyprokash Debnath, Xuyi Luo, Hector Parra, Enxia Zhang

University: University of Central Florida

Abstract: This study examines the electrical stress-induced reliability of enhancement-mode GaN high electron mobility transistors (HEMTs) manufactured by Efficient Power Conversion Corporation. The study evaluates the influence of both off-bias and on-bias stress on device performance to uncover potential degradation pathways. Key assessments included temperature-dependent current-voltage (IV) measurements, threshold voltage shifts, leakage current variations, stress-induced breakdown, and post-stress recovery for EPC 2037 and EPC 2038 devices. The results indicate that the operational voltage limits specified in the datasheets do not entirely hold, as premature breakdown was observed under stress conditions. Analysis of temperature effects revealed an increase in gate leakage current and a progressive negative shift in threshold voltage with rising temperatures. Under electrical stress, a positive shift in threshold voltage was the dominant behavior, alongside changes in gate leakage current. Additionally, recovery trends following stress demonstrated partial reversibility of degradation in some cases. These insights are valuable for developing improved strategies to enhance the durability and operational performance of future GaN power devices for defense and space applications.

Authors: Eric Bissell, Steven Lass, Alexandros Kostagiannes, Anna Zachariou, Barbara Cook, Romain Gaume, Parag Banerjee

University: University of Central Florida

Abstract: Atomic layer deposition (ALD) is a high precision thin film growth technique that can deposit materials with atomic level fidelity through self-limited, sequential reactions resulting in pin-hole free films with excellent step coverage and conformality. These advantages have cemented ALD as a cornerstone process in microelectronics while driving efforts in materials development through development of innovative molecular precursors. At its core, the interactions between precursor ligands and the surface critically influence the resulting film properties. 

Ruthenium (Ru) has emerged as a promising material with its low bulk resistivity and high work function making it ideal for conductive films, interconnects and diffusion barriers. Numerous Ru complexes with different ligands have been studied to refine deposition processes and improve film performance with the most widely used being η4-2,3-dimethylbutadiene ruthenium tricarbonyl [Ru(DMBD)(CO)3]. [1] 

In this study, we investigate the growth characteristics of (diene)Ru(CO)3 complexes and resulting film properties. By employing in situ spectroscopic ellipsometry (SE), quadrupole mass spectrometry (QMS) and a previously reported rapid ALD process development methodology we probe for conditions that lead to saturation.[2] This novel approach results in a 3D visualization that defines key deposition characteristics. The resulting Ru film properties were further studied by x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD) and four-point probe resistivity measurements.

Authors: Joyprokash Debnath, Enxia Zhang

University: University of Central Florida

Abstract: Single event effects (SEEs) induced by heavy ion species in the space environment pose significant challenges for space electronics. To mitigate these effects, a deep understanding of their underlying mechanisms is essential for designing radiation-hardened devices. Power diodes, fundamental components in electronic devices, can benefit from the use of wideband gap materials such as GaN, SiC, β-Ga₂O₃ to prevent SEEs. Among these materials, β-Ga₂O₃ has emerged as a promising candidate for next-generation power electronics due to its superior critical breakdown electric field and higher bandgap compared to GaN and SiC. However, due to the lack of p-type doping, vertical β-Ga₂O₃ Schottky barrier diodes are ideal for power electronics applications. In this study, the impact of a field-plated structure for edge peak electric field termination was systematically investigated using Technology Computer Aided Design (TCAD) simulations. Results show that the field-plated structure enhances breakdown voltage by up to ~200% compared to a structure without a field plate. Further improvements of ~50% were observed by adding metal rings around the anode contacts. The effects of heavy ions on these three structures were also analyzed using Sentaurus TCAD simulations, which suggest that the field-plated structure with metal rings holds potential as a radiation-hardened device for space applications.

Authors: Isabelle Eskanos, Sophia Selvarajan, Isabelle Eskanos, Raneen Qasim, Albert Kim

University: University of South Florida

Abstract: We present an engineered piezoelectric polymer for enhanced cell adhesion. The beta phase of poly (vinylidene fluoride) or PVDF generates an additive dipole moment due to the trans-planar pattern of the fluorine atoms within the film, which may impact the cell adhesion when contacted. We sought to engineer the surface of PVDF films in a way the beta phase can be realized in a patterned manner. We hypothesize that patternable beta phase configuration within the poled film can enhance surface charge density, resulting in control over cell adhesion. 

The fabrication of surface-engineered PVDF started with a pre-gel solution, which was prepared using approximately 1 g of PVDF, mixed in 8 mL of acetone at 85 °C. The pre-gel solution was then spin-coated at 600 RPM for 10 min before adding 4 mL of Dimethyl sulfoxide, followed by through mixing for 45 min. Note that a piece of silicon wafer (4 x 4 cm) was used as a substrate for spin coating. Using approximately 2 mL of solution in a two-step spin coating process of 500 RPM for 5 sec followed by 5,000 RPM for 30 sec provided the optimal film thickness of approximately 35 µm. The films were then baked for two hours at 85 °C before being peeled off from the substrate and trimmed to the size of a six-well plate. The films underwent one of four different poling variation groups: 1) intrinsic (no heating or poling), 2) heating only, 3) poling, and 4) pattern poling (we used a line as a proof-of-concept). The poling was achieved by applying high voltage across the film (57 kV/mm) under heating at 40°C for 20 min. Similarly, the pattern (or ling) poling was achieved by introducing a platinum wire (d = 0.5 mm) across the center of the film between the poling stage. After fabrication, the films were sterilized using 70% ethanol with penicillin and streptomycin for three cycles of 10 min before washing thrice with DPBS and air drying. To validate the enhanced cell adhesion due to the piezoelectric effect, the films were placed in a 6-well plate and seeded with neuroblast (SH-SY5Y) cells (population was 100,000 cells per well). LIVE/DEAD™ Viability/Cytotoxicity Kit (Calcein AM and Ethidium Homodimer-1) was used for cell staining at the end of a 7-day period where images were taken each day after seeding. 

The results showed prominent cell attachment and proliferation in the polarized PVDF films, while there was limited cell attachment and low viability of non-polarized areas. Furthermore, cell adhesion and growth along the direction of pattern poling were observed. Within the same film, we also observed no significant cell attachment in the non-polarized area. Indeed, the surface engineering of piezoelectric PVDF films can provide a promising avenue for next-generation tissue engineering.

Authors: Nicholas Gagnon, Jacob Dorfman, Sanjida Sultana, Henri Baldino, Daniel Hedlund, Piotr Kulik

University: University of Central Florida

Abstract: Microelectromechanical systems-based resonators face challenges, including a limited frequency range and complex designs for tunability. Current approaches require either multiple geometries or independent biasing of resonators, leading to significant design restrictions and fabrication difficulties. To address these challenges, we designed a double-sided resonator using aluminum, yttrium iron garnet, and gadolinium gallium garnet layers where the part of the aluminum layer was ablated by laser to create the final resonator design. The geometry enables two distinct resonances using a single static magnetic bias applied through neighboring permanent magnets with zero power consumption. The out-of-plane magnetic field simultaneously biases both resonators, resulting in independent resonances. These resonances can be coupled to create a magnetically tunable bandpass filter or operate independently as tunable oscillators. 

Simulations show resonance frequencies of 2.63 GHz with a magnetic bias of 880 Oe and 2.71 GHz with a bias of 980 Oe. These results closely match calculated values using a mathematical equation describing the resonance frequency, the Kittel equation. The resonator geometry achieves impedance matching to 50 Ω and demonstrates significant impedance shifts with the applied magnetic field. To facilitate testing, vias connecting the bottom probe pads to the top surface allow easier measurements. Future efforts will focus on enhancing the performance of the device, as well as making new magnetically tunable devices with new functionalities. 

The performance and functionality of resonators and devices are being explored through three optimization strategies: design, material, and magnetic flux concentration. Design optimization allows the resonator to switch operating frequencies by altering its structure, enabling sensitivity to magnetic field responses in specific directions while remaining unaffected in others. Material optimization through ion implantation enables precise control of the magnetic properties of yttrium iron garnet. This method allows independent tuning of resonance frequencies on either side of a double-sided resonator under identical magnetic fields, like the effect of switching out a magnetic material locally with high spatial resolution. Additionally, ion implantation provides high-resolution surface manipulation, enabling localized modifications that pave the way for advanced devices, including magnetic metamaterials. As a semiconductor-friendly technique, it is scalable and ideal for innovative applications. Lastly, magnetic flux optimization focuses on creating a more homogeneous magnetic field, allowing for uniform application and improved control over tunability.  These strategies also enable more advanced devices to be made, where the creativity of the engineer is the limiting factor and not the material and processing steps.

Authors: John Taylor Maurer, Ahmed Mamdouh Mohamed Ahmed, Parsa Khorrami, Sabrina Hassan Moon, Dayane Alfenas Reis

University: University of South Florida

Abstract: Modern computer applications have become highly data-intensive, giving rise to an increase in data traffic between the processor and memory units. Computing-in-Memory (CiM) has shown great promise as a solution to this aptly-named Von Neumann bottleneck problem by enabling computation within the memory unit and thus reducing data traffic. Many simulation tools in the literature have been proposed to enable design space exploration (DSE) of these novel computer architectures, as researchers are in need of these tools to test their designs prior to fabrication. This paper presents a collection of classical, nonvolatile memory (NVM) and CiM simulation tools to showcase their capabilities as presented in their respective works. We provide an in-depth overview of DSE, emerging NVM device technologies, and popular CiM architectures. We organize the simulation tools by design-level scopes with respect to their focus on the devices, circuits, architectures, systems/algorithms, and applications they support. We conclude this work by identifying the gaps within the simulation space.

Authors: Terrick McNealy-James, Xin Kang, S. Novia Berriel, Eric Bissell, Luis Tomar, Blaine Mauri, Ayelen Mora, Taylor Currie, Titel Jurca, Lisa McElwee-White, Parag Banerjee

University: University of Central Florida

Abstract: Atomic layer deposition (ALD) is a high precision thin film growth technique that can deposit materials with atomic level fidelity through self-limited, sequential reactions resulting in pin-hole free films with excellent step coverage and conformality. These advantages have cemented ALD as a cornerstone process in microelectronics while driving efforts in materials development through development of innovative molecular precursors. At its core, the interactions between precursor ligands and the surface critically influence the resulting film properties. 

Ruthenium (Ru) has emerged as a promising material with its low bulk resistivity and high work function making it ideal for conductive films, interconnects and diffusion barriers. Numerous Ru complexes with different ligands have been studied to refine deposition processes and improve film performance with the most widely used being η4-2,3-dimethylbutadiene ruthenium tricarbonyl [Ru(DMBD)(CO)3]. [1] 

In this study, we investigate the growth characteristics of (diene)Ru(CO)3 complexes and resulting film properties. By employing in situ spectroscopic ellipsometry (SE), quadrupole mass spectrometry (QMS) and a previously reported rapid ALD process development methodology we probe for conditions that lead to saturation.[2] This novel approach results in a 3D visualization that defines key deposition characteristics. The resulting Ru film properties were further studied by x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD) and four-point probe resistivity measurements. 

Authors: Brenden M. Mears, David P. Arnold

University: University of Florida

Abstract: The widespread adoption of wireless devices has resulted in excessive amounts of electromagnetic interference (EMI) in the ambient environment. EMI can harm sensitive devices, especially in the microwave and millimeter wave ranges. Efforts towards heterogeneous integration and device miniaturization exacerbate the issues of EMI by packing more devices in a smaller area. As a result, EMI mitigation must be considered when designing for packaging and integration. 

Common methods to shield devices from EMI include metal sheets which have the capability to reflect nearly all EMI. However, physical and chemical properties of metals, such as high density and corrosion, and their redirection of EMI rather than attenuation make metals sub-optimal choices for shields. To address these shortcomings, our previous work investigated the use of polymer-based composites to absorb EMI. These composites consisted of the flexible polymer polydimethylsiloxane (PDMS) with added nanoparticles of barium ferrite (BaM) and carbon nanotubes (CNT). These composites allow for broadband or frequency-selective shields and demonstrate EMI attenuation of over 20dB, or 99%. 

Two printing methods are identified to deploy these shielding composites, or inks, into sensitive electronics. Screen printing involves patterning the ink through a screen or mold and can be done manually or mechanically. Direct write printing (DWP) involves 3D printing the inks into the desired structures. DWP is the preferred printing method, due to its precision of 100 µm or less and ability for rapid prototyping, and will be explored more in future work. 

To demonstrate a shielding application for our composite, a 400-µm-thick layer is screen printed over microstrip traces to prevent radiation in the millimeter wave range. The experimental results show a reduction in radiation compared to the unshielded case of over 5 dB across most of the spectrum from 33 – 50 GHz. This frequency range is notable as it corresponds to the upper portion of the 5G band. Another application of interest involves shielding simultaneous transmit and receive (STAR) antenna arrays from co-site interference for the purposes of improving communications. Preliminary simulation results show a reduction of over 10 dB in co-site interference with the addition of a printed wall of our absorbing composite. 

Authors: Stephanie Moore, Saeed Moghaddam

University: University of Florida

Abstract: Effective thermal management sustains the performance and reliability of modern semiconductor devices as increasing power densities demand innovative cooling solutions. This work presents a micro gap heat sink for semiconductor applications. The micro gaps, fabricated using photolithography, feature narrow channels that maximize surface area-to-volume ratios and enhance heat transfer through the formation and evaporation of ultra-thin liquid films. Engineered pressure gradients ensure uniform fluid distribution, minimizing flow maldistribution and improving thermal performance. This study investigates the fundamentals of the phase-change process, focusing on heat transfer coefficients (HTCs), pressure drop, and flow stability. Single-channel geometries achieve high HTCs due to the interplay between micro gap dimensions, flow rate, and temperature gradients, enabling enhanced heat dissipation under high heat flux conditions. Numerical and experimental analyses reveal that reduced channel depth amplifies heat transfer, offering insights for optimizing micro gap designs.

Authors: M.G. Syamala Rao, Rashi Sharma, Kathleen Richrdson, Brian Millas, JueJun Hu, Parag Banerjee

University: University of Central Florida

Abstract: Gallium antimonide (GaSb) has emerged as a promising material for phase-change applications due to its tunable optical and electrical properties, as well as its potential for low-power operation. In this study, GaSb thin films were deposited using atomic layer deposition (ALD) at low temperatures to achieve high-quality, uniform, and conformal coatings suitable for advanced nanoscale devices. The deposition was performed using trimethylgallium (TMGa) and antimony ethoxide (Sb (OC2H5)) as Ga and Sb precursors, respectively, with a deposition temperature range of 65–95°C. Structural analysis using X-ray diffraction (XRD) confirmed the phase purity and crystallinity of the films, while X-ray photoelectron spectroscopy (XPS) revealed precise stoichiometric control of the Ga:Sb ratio. Optical measurements showed a sharp phase transition between amorphous and crystalline states, with a significant contrast in the refractive index, making these films suitable for optical memory and photonic applications. This study highlights the potential of ALD-deposited GaSb thin films for energy-efficient and scalable phase-change applications.

Authors: Sydney Mutchnick, Philip Feng, Hamed Dalir

University: University of Florida

Abstract: We propose to develop an integrated electronic-photonic platform for ultra-compact and low-power photonic accelerators solving a large spectrum of computational limitations. Leveraging the spatial and spectral degrees of freedom of light, we uniquely perform a 2D photonic convolution as a solution to significantly advance signal processing systems. Our proposed architecture encodes the input signal and the kernel into the optical domain through modulators. The optical input fed into a series of waveguides is an optical frequency comb (OFC) constructed on a silicon-nitride platform which hosts both the waveguides and a III-V laser. The OFC is coupled to the silicon (Si) CMOS chip using an optical via achieved through using two optimized grating structures on two separate chiplets. The OFC is provided to a waveguide array through cascaded Y-junctions, and each waveguide is modulated by an array of resonator-based Si modulators, each modulating one of the OFC lines. The resulting signals from all waveguides propagate on-chip through a metaphotonic-based metalens to form the Fourier transform (FT) resulting in a waveguide array. Each waveguide in this array carries the sum of the FTs of the input and kernel at multiple optical frequencies (corresponding to the OFC lines). The signals at different wavelengths are separated by an array of wavelength demultiplexers each formed by a resonator structure to isolate specific wavelengths with high precision. A key innovation in the architecture is the high-efficiency vertical coupler that couples the separated channel into a vertical Si waveguide, resulting in the output of the demultiplexer array becoming a 2D vertical waveguide array. This vertical array is then coupled to an avalanche photodiode detector (APD) array in which the intensity detection creates the multiplication of the corresponding added signals to create the product of the FTs of the input signal and kernel. Compared to the existing 1D (single wavelength) implementation of this platform, which is limited by the size of the signal and kernel it can handle, the proposed platform leverages heterogeneous integration to dramatically increase the size of the signal without increasing the dimensions of the chip. By using the photonic means for FT generation and multiplication, we aim to demonstrate 6 TOPS at 0.1 pJ OP-1, achieving groundbreaking capability to compute convolution at much higher speed and lower power consumption compared to all existing demonstrations. This is made possible by the ability to form 2D encoding of the information.

Authors: James D. Overmeyer,  William N. Carr,  YK Yoon

University: University of Florida

Abstract: This poster presents semiconductor  materials background   and structural detail for a  new type of micro-battery. This is to our knowledge the first voltaic battery  that does not contain ionic electrolyte or radioactive material. This battery is powered by internal blackbody infrared radiation which exists from any nonreflecting suface at temperatures above absolute zero.  The battery can be fabricated in a state-of-the-art semiconductor foundry.  This battery is an example of a new class of semiconductor devices  based on phononic MEMS device technology.

Authors: Ashok Kumar, Srinivas Katkoori, M. S. Rafique, Natalia Chavez

University: University of South Florida

Abstract: Semiconductor chips have been foundation for a wide range of industries and applications since its debut, and its recent supply chain shortage brings significant implications globally. In the nature of semiconductor manufacturing process, a convergence approach is required to design and deploy diverse new technologies in materials, chemical and materials processes, devices, architectures through the development of application-driven systems. Notably, such semiconductor microfabrication technology cuts across traditional science and engineering disciplines, representing an exceptional opportunity to bring students together from diverse disciplines to learn in a stimulating, interdisciplinary environment. A skilled and diverse pipeline of workers is critical to building a sustainable domestic semiconductor industry and to achieving the economic and national security goals. This National Science Foundation Research Traineeship (NRT) has awarded the University of Florida (USF) to develop and implement a comprehensive and experiential learning-based education, research, training, and skills development program in semiconductor design, manufacturing, and packaging. Over a five-year project duration, this NRT project will train a total of 25 NRT funded students (15 PhD and 8 MS). Approximately 175 unfunded students (50 PhD, 125 MS) will participate in the project-funded activities. The NRT project will embark on a new interdisciplinary curriculum, featuring novel courses in fundamentals of materials, processing, metrology, device fabrication with specific applications to semi-conductor technology development. This NRT project will create the technical focus consists of three major research efforts (MREs): MRE 1: Processing/Metrology/Applications of Semiconductors, MRE 2: Circuit System/Hardware, Artificial Intelligence of Semiconductors, and MRE3: Heterogeneous Packaging Semiconductors. Trainees who complete this NRT program will acquire abilities to: i) work with faculty and semiconductor partner mentors to define research problems using a convergence approach to design and develop application-driven semiconductor systems and devices, ii) carry out semiconductor-based research projects, and iii) develop the interdisciplinary, and global competency skills such as communication, teamwork, project management, ethics, leadership, and more. Trainees with entrepreneurial interest will also have the opportunity to complete USF NSF I-Corps site training.

Authors: Md Mahfuzur Rahman, Hangbo Yang, Volker J. Sorger

University: University of Florida

Abstract: The rapid advancement of photonic integration demands innovative, compact, and efficient devices for three-dimensional (3D) optical signal routing in contemporary communication networks. This work presents a novel design of a Nano-Mirror Coupler (NMC) integrated with Hollow Core Vertical Waveguides (HCVWs) to enable reliable 3D photonic routing with low loss and minimal crosstalk. Advanced simulation techniques are utilized to optimize waveguide configurations, emphasizing the impact of hybrid bonding and interface alignment on performance enhancement.

The proposed system achieves effective vertical and diagonal mode coupling, supported by broadband Finite Difference Time Domain (FDTD) simulations. Key metrics such as insertion loss (IL), crosstalk suppression, and spectral response are thoroughly evaluated across critical design parameters, including NMC pitch, diameter deviation, horizontal/vertical misalignment, and wavelength sensitivity. 

The findings show a total insertion loss of 0.39 dB under isolated conditions and crosstalk reduction to -46.77 dB, outperforming conventional planar approaches. Additionally, the NMC-enabled vertical coupling with HCVWs demonstrates improved optical field confinement and reduced scattering loss, validated through E-field intensity profiles and broadband wavelength analyses. These results confirm the potential of this integrated photonic system for applications in high-density optical interconnects, optical computing, and 3D photonic integrated circuits. 

This study provides valuable insights into scalable, high-performance 3D photonic routing technologies, paving the way for future photonic systems requiring compact, low-loss, and reliable routing solutions.

Authors: Shreya Sahai, YK Yoon

University: University of Florida

Abstract: This work introduces a glovebox-based sol-gel method for fabricating high-crystallinity, crack-free BTO and LNO thin films with extended sol stability for several weeks. The high electro-optic coefficient of BTO coupled with low-loss conductive properties of LNO enables to a design a tunable plasmonic device, offering significant advancements in telecommunications applications. 

Surface plasmon polariton (SPPs) are electromagnetic waves that propagate along a metal-dielectric interface when an electromagnetic field interacts with free electron oscillations on the surface of metal.  Noble metals, such as gold and silver have traditionally been used to stimulate SPPs, but their high optical losses and incompatibility with standard CMOS processing limit their applications. To address traditional challenges of these devices, there has been growing interest in alternative materials that provide reduced losses and improved integration capabilities. Lanthanum Nickelate (LNO), a much-overlooked TCO paired with high dielectric ferroelectric material, Barium Titanate (BTO) offers a hybrid platform for the operation of SPP based plasmonic modulator. LNO, a true metallic perovskite, demonstrates a unique combination of high carrier concentration and low plasmon frequency thus placing it closer to telecommunication frequencies than typical plasmonic materials such as silver. The sub-angstrom Debye length of LNO enables effective modulation of surface carrier concentrations which is crucial for attaining low-loss high speed modulation. BTO offers high dielectric constant and ferroelectric properties which facilitate tunable and non-volatile modulator designs and thus allow effective SPP confinement and reduced leakage currents. 

An optimized glovebox-based sol-gel process is employed to fabricate highly crystalline BTO and LNO thin films on silicon substrates. The sol is prepared under controlled humidity and nitrogen-purged conditions within the glovebox, to extend its shelf-life from an hour to several weeks for the first time. The prepared sol is then spin coated onto the substrate followed by two step pyrolysis to ensure the crack-free, uniform film. Surface roughness and the high crystallinity are assessed using SEM and XRD analysis respectively. 

The proposed tunable plasmonic device leverages the electro-optic properties of Barium Titanate and Lanthanum Nickelate to develop a compact device for microwave photonics. Numerical Simulation were utilized to analyze several key aspects of the device. SPP propagation at BTO/LNO interface was simulated to investigate the efficiency of the device with reduced losses in the telecommunication range. SPP cutoff frequency for the LNO/BTO interface is near to the key telecommunication wavelength of 1550 nm, making this hybrid system extremely attractive for optical communication application.

Authors: Justin Phelps, Zion Franz, Katherine Tharp Muñoz, Reza Abdolvand

University: University of Central Florida

Abstract: This work presents a novel miniaturized Rosen transformer fabricated on a 128° Y-cut lithium niobate wafer. In this design, optimized tethers and acoustic reflectors are carved out of the substrate, enabling a compact implementation of the Rosen transformer with superior quality factor and voltage gain. Measured results from the first-generation device exhibit a quality factor (Q) of approximately 4,700 in air with a measured voltage gain of ~50. Simulations based on the extracted electrical model indicate a peak efficiency of 70% for a 126 kΩ load, an open-circuit voltage gain of 84, and a figure of merit of ~130. This piezoelectric device can serve as an alternative for magnetic transformers, such as those implemented in electric thrust satellite positioning systems. Longitudinal and transverse piezoelectric coefficients are utilized for the Rosen transformer’s operation. An input excitation in the thickness direction generates a lateral field that is picked up from the two surfaces of the resonant block tip, resulting in voltage gain. Typically, these devices operate in the second-harmonic extensional mode. The design and optimization were conducted using COMSOL Multiphysics. The orientation of the device is related to the lithium niobate crystal, which is shown to be near optimal for voltage gain. The tethers’ length and the acoustic reflectors were parametrically optimized using a low reflecting boundary condition to enhance the quality factor. The device measures 11.8mm in length, 0.5mm in thickness, and 2.64mm in width, operating at a resonance frequency of 479kHz. Assuming a 1pF load, the optimized tether length and reflector position increased the anchor quality factor by three orders of magnitude (from the 10s range to 30,000), achieving a simulated gain of 470. The transformer was fabricated on a 500µm thick 128° rotated Y Cut lithium niobate wafer using laser ablation. Vias, tethers, and reflectors were etched into the material. Nickel was then deposited on the front and back of the device using a shadow mask and sputtering process. The input electrical resistance was enhanced through subsequent copper electroplating. The device was characterized by using a probe station and a Rhode and Schwartz ZNB8 Vector Network Analyzer. From the S21 and Z11 parameters, the unloaded Q was determined to be ~5140 and the effective coupling (𝑘 ) was found to be .25% yielding a figure of merit of 13 (Figure 5). The 𝑒𝑓𝑓 2 discrepancy between simulated and measured Q is partially attributed to fabrication nonidealities as well as air damping which is not captured in the simulation. A significant improvement to the quality factor would be expected if the device operated in vacuum conditions. Using the VNA as a signal source, a Rhode and Schwartz RTO 1024 oscilloscope and a RTZS10E active probe (1 Meg ohm .8pF) a voltage gain of 50 was measured.

Authors: Terrick McNealy-James, Ruthlyn Mangroo, S. Novia Berriel, Luis Tomar, Eric Bissell, Taylor M. Currie, Justin Moore, Titel Jurca and Parag Banerjee

University: University of Central Florida

Abstract: Atomic layer etching (ALE) is a powerful technique for material removal with angstrom level control. In the work, focusing on the influence of the film’s structure (i.e., crystallinity and doping) on the etch rates. The ALE process employed for ZnO etching consists of alternate pulses of acetylacetone and O2 plasma, spanning temperatures from 120 °C to 300 °C.1 The etch rates of epitaxial, single crystalline films are compared with polycrystalline ZnO. The effect of dopants, such as Al3+ on the etch rates of ZnO films are explored. The in situ spectroscopic ellipsometry was utilized to comprehensively map the etch rate as a function of temperature and reactant pulse time. The resulting 3D contour plot of etch rate vs. temperature and pulse time defines the process parameter ‘window’, aiding in the comprehension and optimization of the ALE process.

Authors: Alexander Wilcher, YK Yoon

University: University of Florida

Abstract: The transition to 224 Gbps Ethernet represents the next-generation standard for high-speed data transmission, driven by the increasing demands of data centers, high-performance computing (HPC), AI/ML, IoT, 5G/6G, and quantum computing. Building upon 112 Gbps technology, 224 Gbps technologies leverage PAM4 modulation at a Nyquist frequency of 56 GHz, offering double the bandwidth, lower jitter, and improved per-bit power efficiencies. However, scaling to 224 Gbps presents challenges in signal integrity and overall power dissipation, particularly as higher data rates with higher Nyquist frequencies increase attenuation, jitter, and crosstalk, and necessitate precise bit error rate (BER) control below 1e-6. 

To address these challenges, previous technology nodes optimized interconnects for specific applications, including short-reach interconnects within a package or board, like Chip-to-Chip (C2C), Chip-to-Package (C2P), Chip-to-Subsystem (C2S); medium-reach connections between chips and communication modules, such as Chip-to-Module (C2M), Module-to-Module (M2M); and Board-to-Board and rack-to-rack interconnects for extended distances like Backplane Reach (KR), Medium Reach (MR), Long Reach (LR). Each interconnect type has unique insertion loss requirements, influencing design choices, and while for long-reach optical solutions are commonly employed for short-reach and medium-reach applications, electrical connections using conductors are the most efficient and cost-effective. 

A promising approach to mitigate insertion loss and power dissipation at 56 GHz involves the development of low-loss RF metaconductors. These engineered superlattice structures, composed of ferromagnetic and non-ferromagnetic thin films, are designed to tailor the superlattice structure’s bulk permeability to increase skin depth and reduce resistive losses. Vibrating Sample Magnetometer (VSM) measurements have been used to identify suitable magnetic films, and simulation studies based on these measurements confirm the feasibility of integrating metaconductors into 224 Gbps interconnects. These findings demonstrate the possibility of a novel materials-based solution to ameliorate challenges faced by next-generation Ethernet technologies.

Authors: Rumana Zahir, Tanvir Hasan, Warut Labnongsaeng, Kalpathy Sundaram, Masahiro Ishigami, F. Javier Gonzalez, Robert E. Peale

University: University of Central Florida

Abstract: Sputtered Sb₂Te₃ and Bi₂Te₃ films were optimized for thermoelectric devices that require photolithographic processing. Post-patterning anneals are required to activate the sputtered films. Electrodynamic properties are critical to the performance of devices such as antenna-coupled thermoelectric THz/mm-wave detection and radiant-heat energy harvesting. Infrared reflectance spectroscopy, profilometry, resistivity, and thermal conductivity measurements show that annealing thickens the films, increases their refractive indices, increases thermal conductivity, and activates both electrical conductivity and Seebeck effect.  Annealing lowers resistivity by increasing the carrier relaxation time without changing carrier concentration. This conclusion follows from reflectivity spectra, in which strengths of plasma-features, but not their frequency positions, depend on annealing.  Examples of fabricated mm-wave detectors, their simulation-guided design, and initial device characterization results are presented.

Authors: Saeyeong Jeon, YK Yoon

University: University of Florida

Abstract: As electronic systems advance toward higher operational frequencies in the millimeter-wave range, the need for efficient and sustainable materials becomes increasingly critical. Conventional copper-based interconnects face significant limitations, including high AC losses, increased power consumption, and excessive heat generation at high frequencies, which hinder their scalability and performance. This work introduces a groundbreaking metaconductor technology based on a Cu/Co superlattice structure that addresses these challenges by leveraging unique electromagnetic properties. The metaconductor films are fabricated using an advanced electroplating method optimized to achieve precise layer thickness and uniformity, ensuring superior high-frequency performance. By suppressing the skin effect and reducing high-frequency losses, this technology achieves remarkable results, including a 50% reduction in RF resistance in Cu/Co coplanar waveguides at 28 GHz, a 9 dB gain enhancement in Cu/Co array antennas at 28 GHz, and a 236% improvement in Q factor for air-lifted inductors operating at 32.5 GHz compared to conventional copper counterparts. These achievements are pivotal for applications in artificial intelligence, data centers, supercomputing, and 5G/6G communications, where operational efficiency and sustainability are paramount. This research highlights the scalability of metaconductor technology and its potential to serve as a transformative alternative to conventional copper-based semiconductors. By collaborating with leading industry partners, including foundries, defense contractors, and technology firms, this work lays the foundation for next-generation high-frequency devices that balance performance with sustainability. The integration of metaconductor-based components marks a significant step forward in meeting the growing demands of modern electronic systems while minimizing environmental impact.